IIT Hyderabad Recruitment 2026 for 3 Analog Layout Engineer Posts

Indian Institute of Technology Hyderabad (IITH) has announced the recruitment of 3 Analog Layout Engineers on a full-time contractual basis under an R&D project at DARMIC LAB. This opportunity is ideal for freshers or early-career professionals with a B.Tech in Electronics and Communication Engineering (ECE) who are skilled in analog layout techniques and design verification tools. The selected candidates will play a key role in delivering custom analog layouts for IPs like PLLs, ADCs, DACs, and voltage references, while collaborating with circuit designers and verification teams. The position offers hands-on experience in industry-grade design tools like Cadence Virtuoso and Mentor Graphics, making it a valuable opening for those aiming to build a career in VLSI or semiconductor design.

Vacancy Details

How to Apply

1. Visit the official IIT Hyderabad website at https://www.iith.ac.in
2. Download the application form or follow the application instructions under the recruitment section.
3. Fill out the form with accurate personal, academic, and experience details.
4. Attach your updated resume and any relevant certificates or project portfolios.
5. Submit the application via email or upload as directed on or before 25 January 2026.
6. Shortlisted candidates will be contacted for a virtual/in-person interview by the DARMIC LAB team.

Application form, details & registration

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